Published German patent document DE 34 45 617 describes a method and an arrangement for serially transmitting the digital measured values of a measuring transducer. Included in it are shift registers, which perform a parallel-to-serial conversion in order to transmit the information. The shift registers are a discrete module or modules, which must be controlled by a logic circuit or control unit. That is, the processing unit itself or the CPU, e.g., that of the transmitting station, is loaded by the transmission. Therefore, in this known art, the processing unit or CPU controls the data transmission with an aid of a special clock-pulse train (cf. SPI interface or SCI interface, as well).
For serial interfaces, a bus protocol must be implemented or the transmission/receiving register must be operated by the CPU. In addition, information items, which only have a weak relationship to time, i.e., bring about problems regarding the real-time capability, are normally transmitted in the case of the mentioned, serial interfaces. Therefore, no fixed coupling of the CPU time base to the pin status occurs.
Therefore, it has been found that the known art is not capable of yielding optimum results in every respect. Thus, an object is to provide serial data transmission, where on one hand, the CPU is not loaded, and on the other hand, the real-time capability may nevertheless be ensured.